1. Field of the Invention
The invention relates to hetero-junction bipolar transistors and, more particularly, to a hetero-junction bipolar transistor structure with an emitter that exhibits a reduced delay time and a method of forming the structure.
2. Description of the Related Art
As the switching speed of silicon germanium (SiGe) hetero-junction bipolar transistors (HBTs) approaches and extends beyond 350 GHz, the base transit time for such HBT devices is in the range of approximately 100 fs. The emitter delay time for such devices is typically smaller than the base transit time. However, as base size is scaled down, the emitter transit time is becoming an increasing portion of the overall HBT forward transit time. In the near future emitter delay time may actually be of the same magnitude as base transit times and may effectively limit the transistor AC performance. Thus, there is a need in the art for a SiGe HBT that exhibits a reduced emitter transit time in order to obtain an improved overall forward transit time and improved switching speed performance.